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FDS6911 Dual N-Channel Logic level PowerTrench(R) MOSFET
March 2006
FDS6911
Dual N-Channel Logic Level PowerTrench(R) MOSFET
20V, 7.5A, 13m
General Description
These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
Features
rDS(on) = 13 m @ VGS = 10 V rDS(on) = 17 m @ VGS = 4.5 V Fast switching speed Low gate charge High performance trench technology for extremely low RDS(ON) High power and current handling capability
D1 D
D1 D
DD2 D2 D
5 6 7
Q1
4 3 2
Q2
SO-8
Pin 1 SO-8
G1 S1 S
G2 S2 G
S
8
1
S
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed
TA=25oC unless otherwise noted
Parameter
Ratings
20 20
(Note 1a)
Units
V V A W
7.5 20 1.6 1.0 0.9 -55 to +150
Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)
TJ, TSTG
Operating and Storage Junction Temperature Range
C
Thermal Characteristics
RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 40
C/W C/W
Package Marking and Ordering Information
Device Marking FDS6911 Device FDS6911 Reel Size 13'' Tape width 12mm Quantity 2500 units
(c)2006 Fairchild Semiconductor Corporation FDS6911 Rev A(W)
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FDS6911 Dual N-Channel Logic level PowerTrench(R) MOSFET
Electrical Characteristics
Symbol
BVDSS BVDSS TJ IDSS IGSS
TA = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage
(Note 2)
Test Conditions
ID = 250 A VGS = 0 V, ID = 250 A, Referenced to 25C VDS = 20 V, VGS = 0 V VDS = 20 V, VGS = 0 V, TJ = 55C VGS = 20 V, VDS = 0 V ID = 250 A VDS = VGS, ID = 250 A, Referenced to 25C VGS = 10 V, ID = 7.5 A VGS = 4.5 V, ID = 6.5 A VGS = 10 V, ID = 7.5 A,TJ = 125C VGS = 10 V, VDS = 5 V VDS = 5 V, ID = 7.5 A
Min Typ Max
20 28 1 10 100
Units
V mV/C A nA
Off Characteristics
On Characteristics
VGS(th) VGS(th) TJ rDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance
1
1.8 -4.7 10.6 13 14.5
3
V mV/C m
13 17 20
ID(on) gFS
20 36
A S
Dynamic Characteristics
Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance
(Note 2)
VDS = 15 V, f = 1.0 MHz
V GS = 0 V,
1130 300 100 2.4
pF pF pF
VGS = 15 mV, f = 1.0 MHz
Switching Characteristics
td(on) tr td(off) tf Qg(TOT) Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time
VDD = 15 V, VGS = 10 V,
ID = 1 A, RGEN = 6
9 5 26 7 17
18 10 42 14 24 13
ns ns ns ns nC nC nC nC
Total Gate Charge at Vgs=10V Total Gate Charge at Vgs=5V Gate-Source Charge Gate-Drain Charge VDD = 15 V, ID = 7.5 A,
9 3.1 2.7
FDS6911 Rev A(W)
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FDS6911 Dual N-Channel Logic level PowerTrench(R) MOSFET
Electrical Characteristics
Symbol
IS VSD trr Qrr
TA = 25C unless otherwise noted
Test Conditions Min Typ Max Units
1.3
(Note 2)
Parameter
Drain-Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VGS = 0 V, IF = 7.5 A, IS = 1.3 A A V nS nC 1.2 24 13
diF/dt = 100 A/s
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a) 78C/W when mounted on a 0.5 in2 pad of 2 oz copper
b) 125C/W when mounted on a .02 in2 pad of 2 oz copper
c) 135C/W when mounted on a minimum pad.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
FDS6911 Rev A(W)
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FDS6911 Dual N-Channel Logic level PowerTrench(R) MOSFET
Typical Characteristics
20
2.6 rDS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
VGS = 10.0V 3.5V
VGS = 3.0V
16 ID, DRAIN CURRENT (A)
2.2
4.5V
12
4.0V 3.0V
1.8
3.5V
8
1.4
4.0 4.5V 5.0 6.0V 10.0V
4
1
0 0 0.25 0.5 0.75 1 VDS, DRAIN-SOURCE VOLTAGE (V) 1.25 1.5
0.6 0 4 8 12 ID, DRAIN CURRENT (A) 16 20
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.04
1.6 rDS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 7.5A VGS = 10V 1.4
ID = 3.8A
rDS(on), ON-RESISTANCE (OHM)
0.03
1.2
TA = 125 C 0.02
o
1
0.8
0.01
TA = 25 C
o
0.6 -50
0 -25 0 25 50 75 100 o TJ, JUNCTION TEMPERATURE ( C) 125 150 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10
Figure 3. On-Resistance Variation with Temperature.
20
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100
IS, REVERSE DRAIN CURRENT (A)
VDS = 5V 16 ID, DRAIN CURRENT (A)
VGS = 0V 10 TA = 125 C
o
1
12 TA = 125 C 25 C 8 -55 C 4
o o o
0.1
25oC
0.01
-55 C
o
0.001
0 1.5 2 2.5 3 3.5 VGS, GATE TO SOURCE VOLTAGE (V) 4
0.0001 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
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FDS6911 Rev A(W)
FDS6911 Dual N-Channel Logic level PowerTrench(R) MOSFET
Typical Characteristics
10 VGS, GATE-SOURCE VOLTAGE (V) ID = 7.5A
1400 1200
f = 1MHz VGS = 0 V
8 15V 6 20V 4 CAPACITANCE (pF) VDS = 10V 1000 800 600
Ciss
Coss
400 200
2
Crss
0 0 4 8 12 Qg, GATE CHARGE (nC) 16 20 0 0 5 10 15 20 25 VDS, DRAIN TO SOURCE VOLTAGE (V) 30
Figure 7. Gate Charge Characteristics.
100
100s 1ms 10ms 100ms 1s
P(pk), PEAK TRANSIENT POWER (W) 50
Figure 8. Capacitance Characteristics.
RDS(ON) LIMIT
40
ID, DRAIN CURRENT (A)
SINGLE PULSE RJA = 135C/W TA = 25C
10
30
1
DC
10s
20
0.1
VGS = 10V SINGLE PULSE o RJA = 135 C/W TA = 25 C
o
10
0.01 0.1
1 10 VDS, DRAIN-SOURCE VOLTAGE (V)
100
0 0.001
0.01
0.1
1 t1, TIME (sec)
10
100
1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2
0.1
0.1 0.05 0.02 0.01
RJA(t) = r(t) * RJA RJA = 135C/W P(pk) t1 t2
SINGLE PULSE
0.01
TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2
0.001 0.0001
0.001
0.01
0.1 t1, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
FDS6911 Rev A(W)
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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DISCLAIMER
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I18

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